Computer system designers have traditionally increased performance of computing apparatuses by increasing their operating frequencies and by increasing the number of components, such as transistors, in circuits of such apparatuses. To keep circuit sizes manageable designers have reduced or scaled down the size of the circuit components so that increasing numbers of devices fit within smaller per unit areas. Today it is not uncommon to find advanced computer system chips containing millions, sometimes billions, of transistors. This increased density, however, has created numerous problems. One major problem is heat. While individual electronic components, such as transistors, each generate minute quantities of heat while operating, increased numbers of such devices in the newer circuits naturally lead to increased quantities of heat.
To combat problems related to heat and other design challenges, yet still to keep increasing the performance and throughput, designers of computer processors and computing apparatuses are turning to alternative design technologies. Today many designers are developing computing apparatuses having numerous computational circuits, or cores, housed in single chips or packages. Processors having numerous cores often divide computational tasks among the different cores, with the cores being allocated to different partitions or execution domains. Doing so often improves performance and offers other benefits, such as reduced operating frequencies, reduced power consumption, and reduced heat generation. Even with these benefits, however, processors with numerous cores are creating new design challenges.
Currently, no specific mechanisms exist to determine the core allocations for different partitions based upon such factors as performance or temperature. Each partition is arbitrarily assigned a specific number and topology of cores. In other words, cores assigned to a partition may be located within the processor complex in a particular configuration that will impact the performance of the cores and thermal profiles. Usually cores are assigned to partitions in a sequential manner with respect to the core identification numbers (IDs) within a socket. Since the core assignment does not take performance into consideration, there is a potential for resource underutilization at the socket level. Additionally, problems associated with power and heat distribution have not been totally eliminated. Depending on the workloads operating in the individual partitions, the power consumed and the heat generated is heavily dependent on the topological distribution of the participating processor components. Previous studies involving un-partitioned single core processors have shown that, depending on the workloads, thermal hotspots can form on the most “busy” areas of the processor die which may necessitate slowing down or completely shutting-off the processor, which results in performance degradation.